1. Field of the Invention
The present invention relates to medium-power MOS transistors.
2. Discussion of the Related Art
In the field of medium power MOS transistors, structures of vertical type in which the source is on the front surface side and the drain is on the rear surface side, and structures of lateral type in which the source and the drain are on the front surface side, are known. Generally, when the current to be switched is relatively high, transistors of vertical type are preferred, to minimize access resistances.
Indeed, as will be shown hereafter, lateral-type structures pose a problem linked to the resistances of the metallizations of access to the source and/or to the drain.
However, lateral structures are often easier to form and technologically simpler.
FIGS. 1A and 1B respectively illustrate a simplified cross-section view and a top view of a conventional P-channel MOS transistor of lateral type. FIG. 1A is a cross-section view along line Axe2x80x94A of FIG. 1B. It should be noted that none of the drawings is to scale with respect to a real device and that these drawings are not scaled with respect to each other, as is conventional in the representation of semiconductor components.
The P-channel MOS transistor of FIGS. 1A and 1B is formed in an N-type semiconductor substrate 1, generally an epitaxial layer formed above a single-crystal N+-type silicon wafer. Above this substrate are formed gate fingers 3 separated from the substrate by a thin insulating layer 4. Conventionally, the gate fingers are made of polysilicon and the gate insulator is silicon oxide. The gate fingers are interconnected and connected to a gate terminal in a way not shown. The gate fingers are covered and laterally surrounded with an insulating layer 5, also generally made of silicon oxide. These gate fingers are used as a mask for forming in the substrate 1 a heavily-doped P-type regions. These P regions alternately correspond to source fingers S and to drain fingers D. Each of the source fingers and of the drain fingers is covered with a metal finger, respectively 7 and 8. The metal fingers are etched in a first metallization level. The structure is covered with an insulating layer 9 in which openings are formed to enable establishing contacts between a source metallization 11 and the source metal fingers 7 and between a drain metallization 12 and the drain metal fingers 8. The source and drain metallizations are etched in a second metallization level. Only drain metallization 12 is visible in the cross-section view of FIG. 1A.
In the top view of FIG. 1B, source metallization 11 has been shown in contact with extensions of source fingers 7. The drain metallization substantially covers all the drain and source fingers and is in contact with the drain fingers. The contact areas between the first and second metallization levels are indicated in FIG. 1B by squares marked with a cross. Whatever the topology chosen for the second metallization level, it should be noted that, at least for the drain fingers or the source fingers, there exists a certain length of the first metallization level between the contact with the second metallization and the end of each finger, which corresponds to an access resistor.
One of the aspects of the present invention is to take into account the existence of this access resistor and its value. Assuming that the drain and source metal fingers have a 1-xcexcm width and are distant from one another by 1 xcexcm, that is, for a square having a one-millimeter side, there will be approximately 250 source fingers and 250 drain fingers, and assuming that the first metal level has a sheet resistance of 60 mxcexa9 per square, this means that a 1-mm long and 1-xcexcm wide stripe has a 60-xcexa9 resistance. For a square having a 1-mm side comprised of 250 fingers, the resistance will be 60/250 xcexa9 or 240 mxcexa9 or, in other words, 240 mxcexa9.mm2. In a current technology, this resistance is higher than the on-state resistance of the actual channel area, which is on the order of 50 mxcexa9.mm2.
In the example of structure of FIG. 1B, this metal resistance is essentially due to the source fingers. The contact between the metallization level and the drain fingers is, however, very satisfactory.
Thus, an object of the present invention is to provide a medium power MOS transistor structure of lateral type in which the resistances of access to the drain and to the source are reduced.
A more specific object of the present invention is to provide such a transistor of P-channel type.
The present invention aims at reducing the access resistance to a multiple-finger lateral MOS transistor.
To achieve this and what other the present invention provides a MOS power transistor formed in an epitaxial layer of a first conductivity type formed on the front surface of a heavily-doped substrate of the first conductivity type, including a plurality of alternate drain and source fingers of the second conductivity type separated by a channel, conductive fingers covering each of the source fingers and the drain fingers, a second metal level connecting all the drain metal fingers and substantially covering the entire source-drain structure. Each source finger includes a heavily-doped area of the first conductivity type in contact with the epitaxial layer and with the corresponding source finger, and the rear surface of the substrate is coated with a source metallization.
According to an embodiment of the present invention, the heavily-doped area of the first conductivity type of each source finger extends substantially over the source finger length.
According to an embodiment of the present invention, the heavily-doped area of the first conductivity type of each source finger extends over selected areas of the source finger length.
An advantage of the present invention is that, in the more specific case of a P-channel MOS transistor, the described structure is very compatible with existing manufacturing technologies and currently-used substrates (N-type epitaxial layer on an N+ substrate).
The foregoing objects, features and advantages of the present invention, will be discussed in detail in the following non-limiting description of specific embodiments in connection with the accompanying drawings.